1. Technical Field
The present invention relates to data storage and more particularly to systems and methods for efficient storage of waveform libraries.
2. Description of the Related Art
Traditional, delay and slew based, library cell modeling methodology is no longer accepted as accurate for the new nanometer-era CMOS technologies. Recently, the industry is in the process of adopting a more detailed Current Source Modeling (CSM) as an alternative. Effective Current Source Model (ECSM) (initially developed by Cadence Design Systems™ and adopted by SI2 Open Modeling Coalition), and Composite Current Source Model (CCS) (proposed by Synopsys™) are extensions of the Liberty library format and contain separate models for timing, noise, and power applications.
The new CSM modeling paradigm combined with technology trends requires significantly more memory resources compared to traditional techniques. CSM modeling requires the storage of tables of current or voltage waveforms in addition to just the delay and slew quantities. Additionally, the increased parameter variability inherent in modern VLSI technologies, forces the timing analysis to rely on library characterizations of even more points in the temperature, voltage and process space, thus further compounding the library size problem. In addition, the noise and power verification tools are also in the process of converting to waveform-based models, causing a further explosion of the library modeling data.
Library characterization tools already attempt waveform compression in various ways, e.g., Nangate public library stores waveforms with a minimal number of points, but on a non-uniform voltage grid. This effectively doubles the information that needs to be stored. Synopsys Liberty NCX™ uses an empirical waveform compression scheme that takes into account key features of the current versus time waveforms. As such, their method is very specific to their particular modeling methodology. For statistical timing analysis purposes, a compact variational waveform model is represented by storing the nominal waveform and its perturbations (e.g. time shifting, time scaling, voltage shifting, and voltage scaling). However, the nominal waveform, itself, is not stored in a compact form, therefore, requiring large memory resources during timing analysis.
In one existing system, voltage waveforms of gates are modeled as a linear combination of a fixed set of basis waveforms chosen by singular value decomposition (SVD). However, this approach may result in non-casual waveforms for some complex gates especially in the CMOS library which contains transmission-gates.